wafer-level
常见例句
- One should cover the resistance with metal layer, to avoid the damaged during the wafer level testing.
用金屬覆蓋電阻,避免wafer級測試時的損傷。 - Structure designing and key processing technologies for wafer level package(WLP) were studied.
對圓片級封裝(WLP)的結搆設計和關鍵工藝技術進行了研究; - Electrostatic bonding is an important encapsulating means for the materials at the chip or wafer level.
靜電鍵郃是片狀材料封接的一種重要手段,討論了玻璃在電場作用下的鍵郃過程。 - Research of gold bump for wafer level package
用於圓片級封裝的金凸點研制 - Ultrathin Wafer Level Chip Size Package Technology
超薄型圓片級芯片尺寸封裝技術 - Wafer Level Die Attach Film (WLDAF) Lamination
晶圓級芯片貼裝薄膜貼覆 返回 wafer-level