edge-triggered

基本解释

A novel CMOS ternary D type edge triggered flip flop using a single latch is presented.
提出了一种只使用单个锁存器的CMOS三值D型边沿触发器设计 .
Furthermore,the proposed construction can be easily extended to the design of multiple valued edge triggered flip flop with a higher radix.
此外 ,该设计结构极易推广至基值更高的多值边沿触发器的设计
Use INT1 edge trigger, interrupt subroutine allowed to deliver and receive the return code value.
使用INT1边沿触发，中断子程序能读出并返回接收到的代码值。
Utilizing the function of positive and negative edge trigger of the programmable counter array (PCA) unit in MPU, signal zero-cross is captured for the phase detected based on double way.
可编程计数器阵列PCA“捕获”信号的过零点用于双向过零平均鉴相，得到准确的相位差和周期；
Design and Application of Double Edge Trigger Counter
双边沿触发计数器的设计和应用